1. Field of the Invention
The present invention relates to drive circuits (or drivers). More particularly, the present invention defines an improved push-pull driver having edge conditioning and non-overlap control. The present invention further describes circuits and techniques for actively tuning the output of a push-pull driver.
2. Description of the Related Art
Push-pull circuits are well known and have been adapted to digital and analog applications as varied as stepping motor control, audio loudspeakers, and memory systems. In the present context, push-pull circuits have been used in bus systems including one or more devices that output data onto a common bus. As used throughout, the term xe2x80x9cbusxe2x80x9d refers to one or more conductive paths communicating electrical signals between two points.
Push-pull circuits have excellent drive characteristics. That is, push-pull circuits routinely provide clean rising and falling edges for high speed data signals being driven onto a bus. This capability is realized by effective control of two stages generically illustrated in FIG. 1.
In FIG. 1, a push-pull drive circuit is shown as implemented in CMOS and comprises a PMOS-transistor first stage 1 and NMOS-transistor second stage. In theory, the effective switching of the first and second stages controls a current path between a voltage source (VSS) and ground. Ideal switching by the input signal 3 of ideal first and second stages (i.e., perfectly sized and implemented CMOS devices) produces an ideal output signal 4, shown as curve xe2x80x9cAxe2x80x9d in the graph of FIG. 2. The production of this ideal output signal requires an exact actuation timing relationship between the first and second stages of the push-pull driver. This relationship requires that the switching input signals turn OFF one stage of the push-pull driver while simultaneously turning ON the other stage.
However, as one would expect, process variations in the fabrication of the first and second stage CMOS devices, as well as variations in device performance due to operating voltage and temperature variations, (collectively and generically referred to hereafter as xe2x80x9cPVTxe2x80x9d for process, voltage and temperature), result in very different output curves. For example, curve xe2x80x9cBxe2x80x9d shown in FIG. 2 illustrates an occurrence in which both stages of the push-pull driver are simultaneously OFF and a voltage knee momentarily forms in the output signal before one of the stages turns ON. Curve xe2x80x9cCxe2x80x9d in FIG. 2 illustrates an occurrence in which both stages of the push-pull driver are simultaneously ON and current momentarily xe2x80x9cshoots-throughxe2x80x9d the channel between VSS and ground.
In a digital system, this shoot-through phenomenon is well understood and results in considerable noise being transmitted onto the bus, absent some design remedy. Historically the remedy has come in the form of a large by-pass capacitor shunting the shoot-through current to a ground plane in the CMOS substrate. Unfortunately, as bus systems are required to run at ever increasing data rates this brute force method of dealing with shoot-through becomes less and less acceptable. This is particularly true where bus widths are wide and where data signals are driven onto the bus using multiple clocks and/or multiple clock edges.
Many conventional double-data-rate (xe2x80x9cDDRxe2x80x9d) memory systems use push-pull drivers to communicate data between bus system devices and the bus. This approach differs from other bus systems having integrated circuit using simpler, open-drain output drivers. As DDR memory systems and similar data communication systems push the envelop for high-speed data transfer, push-pull shoot-through noise and the corresponding charge dump via by-pass capacitors becomes increasing unacceptable.
It is further understood that by placing a xe2x80x9cpre-driver circuitxe2x80x9d in front of a push-pull driver performance of the push-pull driver may be enhanced. Looking at the simplified circuit shown in FIG. 3 as an example, an adjustable pre-driver 20 precedes the push-pull driver 21. This combination is shown in greater detail in FIG. 4, wherein the push-pull driver is formed by the combination of P0 and N0 connected between a voltage source and ground.
Conventionally, selected control signals sampled from the pre-driver circuit are used to monitor (or sense) the integrity of the switching signal(s) applied to the push-pull driver. For example, by comparing the timing of a voltage waveform taken at pointxe2x80x94Axe2x80x94in the PMOS driver 22 of FIG. 4 with the timing of a voltage waveform taken at pointxe2x80x94Axe2x80x2xe2x80x94in the NMOS driver 23 of FIG. 4, one may roughly understand the quality of the switching signals. However, such pre-driver sensing techniques do not account for PVT affects at the PMOS and NMOS output transistors. Nor does pre-driver sensing detect or address the problem of shoot-through.
At a minimum, performance of the conventional push-pull driver would be greatly benefitted from edge conditioning and/or improved non-overlap protection. Performance of the conventional push-pull driver would also be enhanced by providing slew rate control.
Edge conditioning prevents undershoot and overshoot at the terminal stages of the output waveform. The term xe2x80x9coverlapxe2x80x9d refers to the condition where both stages of the push-pull driver are ON (or conductive) and shoot-through occurs. Thus, non-overlap is a desired performance characteristic since shoot-through results in increased substrate (or backplane) noise and increased supply noise. Furthermore, shoot-through creates a requirement for larger by-pass capacitors. Increased by-pass capacitor size may result in a larger overall die size. Additionally, shoot-through results in increased power (and heat) dissipation within the semiconductor device.
The present invention provides greater non-overlap control, thus eliminating shoot-through. Power is conserved, as power previously lost to shoot-through is now applied to driving the output load. The number and/or size of by-pass capacitors may be reduced and die size saved, accordingly. Power (P=I*Vds) is further conserved because the present invention provides faster output transitions by applying a boot-strap circuit utilizing positive feedback.
In another aspect, the present invention provides an actively tuned, CMOS, push-pull driver. Conventional push-pull drivers are generally open loop systems. That is, they sense and set, or periodically adjust, rather than actively monitor and control. The conventional approaches to shoot-through control or skew rate adjustment, which tend to be complicated yet imprecise, are also not scalable with frequency.
In one aspect, the present invention uses a process detector to form a control loop by which shoot-through is prevented and skew rate is controlled. The process detector may take many forms, but as presently preferred a Delay Lock Loop (DLL) is used. Many high speed bus systems already incorporate DLLs or PLLs to adjust clock signals in relation to a fixed frequency reference. By advantageously using an existing set of DLL reference signals, a control loop may be implemented which tracks and adjusts slew rate on a clock cycle by clock cycle basis.
Thus, a closed loop, shoot-through control, feedback loop may be implemented which actively tunes the switching signals in a push-pull driver. The closed loop may be implemented with a filter or delay constant capable of being digitally adjusted. The closed loop feedback sensing points may be implemented with adjustable gain.
The approach taken by the present invention to shoot-through control and slew rate tracking is scalable with frequency. Where a DLL is used as a process detector, timing skews may be controlled by digitally adding or subtracting value(s) from a digital code derived from the DLL reference signals.
By the means set forth above, and as further explained in the brief description of the presently preferred embodiments which follows, the present invention provides slew rate control and shoot-through protection, along with the associated benefits already described.
Within these broad design objectives, one embodiment of the present invention provides a push-pull driver circuit, comprising an NMOS output transistor and PMOS output transistor connected between a voltage source and ground. The respective drains of the NMOS and PMOS output transistors are commonly connected to a driver circuit output terminal. An NMOS pre-driver transistor is used to drive the NMOS output transistor in response to a transmit signal being applied to the NMOS pre-driver transistor through a drive signal path. The push-pull driver circuit also comprises a non-overlap circuit defining a non-overlap signal path for the transmit signal being applied to the NMOS pre-driver transistor. The delay through the non-overlap signal path is less than the delay through the drive signal path.
Alternatively, the push-pull driver circuit may include a boot-strap circuit defining a boot-strap signal path for the transmit signal being applied to the NMOS pre-driver transistor. Here, the delay through the boot-strap path is greater than the delay through the non-overlap signal path and less than the delay through the drive signal path.
In another embodiment, the present invention comprises a push-pull output driver having an output driver current path comprising a NMOS drive transistor and a PMOS drive transistor connected between a voltage source and ground. The push-pull output driver also includes a reference element. A process detector, including a process detector reference element, provides at least one control signal defining a switching signal for the push-pull output driver. A feedback circuit is used to indicate current shoot-through current occurring in the push-pull output driver and to provide a feedback control signal. Based on the feedback signal, a control circuit modifies the switching signal. Of note, the output driver reference element and the process detector element will respond similarly to variations in fabrication processes for the circuit, as well as operating temperature and operating voltage.
The process detector is preferably a delay lock loop (DLL) and the control signal is one or more digital codes derived from the DLL.
In yet another embodiment, the present invention provides a method of defining performance for a push-pull driver circuit having an output driver current path comprising a first output transistor and a second output transistor connected between a voltage source and ground. The method defines a transmission switching signal for the first and second output transistors, detects shoot-through in the output driver current path, generates a feedback signal in response to a detection of shoot-through in the output driver current path, and modifies the transmission switching signal in response to the feedback signal.
In still another embodiment, the present invention provides an output driver circuit including a PMOS output transistor having a source connected to a voltage source and a drain connected to an output terminal, and an NMOS output transistor having source connected to ground and a drain connected to the output terminal. A pre-driver circuit is associated with the output driver circuit and is operable in one of two modes. A first mode applies a transmit signal to the PMOS output transistor and the NMOS output transistor to form a push-pull output driver circuit. The second mode applies the transmit signal to only the NMOS output transistor to form an open-gate NMOS driver circuit.
In yet another embodiment, the present invention provides a method of defining performance in a push-pull driver comprising a first output transistor and a second output transistor and an output driver current path between the first and second output transistors. The method defines digital control codes in relation to a process detector, where the process detector exhibits performance characteristics which track the performance characteristics of the first and second output transistors, and thereafter defines a transmission switching signal for at least one of the first and second output transistors in relation to the digital control codes.
Shoot-through is detected in the output driver current path and a feedback signal is generated in response to a detection of shoot-through in the driver current path. Finally, the digital control codes are modified in response to the feedback signal.
In still another embodiment, the present invention provides a method of controlling shoot-through current in a push-pull driver circuit. The method defines a transmission switching signal for the push-pull driver circuit in relation to a control signal received from a process detector, adjusts the control signal to thereby modify the transmission switching signal until a shoot-through crossover point is determined at which no shoot-through current occurs in the push-pull driver circuit. Upon determining the shoot-through crossover point, the control signal is periodically dithered to re-introduce shoot-through current. Once shoot-through current is reintroduced, the control signal is again adjusted to modify the transmission switching signal until a new shoot-through crossover point is determined at which no shoot-through current occurs in the push-pull driver circuit.
In the description which follows, several examples of the present invention are presented. These are just selected examples. Modifications and adaptations of theses examples will be readily apparent to those of ordinary skill in the art. While the examples teach the present invention, the invention is broader than the examples and is defined by the attached claims.